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60 Second Timer
Problem:
Design an Asynchronous Sixty Second Timer that counts from 0 to 60. This design will have two inputs, a clock and a reset switch. When the reset switch is a 0 the count will be held at 0. When the reset switch is 1, the counting will be enabled. Once the counter hits 60 it will stop counting.
Design an Asynchronous Sixty Second Timer that counts from 0 to 60. This design will have two inputs, a clock and a reset switch. When the reset switch is a 0 the count will be held at 0. When the reset switch is 1, the counting will be enabled. Once the counter hits 60 it will stop counting.
Parts List:
- Circuit Design Software (Multisim)
- Breadboard
- Breadboard Companion
- 74LS48 IC
- 74LS74 IC
- 74LS93 IC
- Common Cathode 7 Segment Display
- Additonal logic gates as needed
- Wires
- Battery (To see if it works)
First Ideas / Brainstorming:
I began working on this problem by sketching out how I thought this circuit would go together in my enginerring notebeook:
I began working on this problem by sketching out how I thought this circuit would go together in my enginerring notebeook:
The MSI portion of the circuit controlling the ones place.
The SSI portion of the circuit controlling the tens place.
The display portion of the circuit:
Simulation:
Once I drew out a rough sketch I used Multisim to design my circuit. There were only a few slight modifications I had to make, specifically dealing with the clock and reset line to get it to work as needed.
Once I drew out a rough sketch I used Multisim to design my circuit. There were only a few slight modifications I had to make, specifically dealing with the clock and reset line to get it to work as needed.
Final Prototype:
After it worked in multisim I used the IC's listed in the parts list, along with some wires, and I prototyped the timer out on the breadboard. Here it is completed:
After it worked in multisim I used the IC's listed in the parts list, along with some wires, and I prototyped the timer out on the breadboard. Here it is completed:
Reflection:
I started this project with just a rough idea of how to complete it by sketching in my engineering notebook. I then moved to multisim where I was able to figure out all the details. The clock input is first AND'ed together with the output of a NAND gate that will be 0 when the counter hits 60. This way once the clock hits 60 the AND gate is 0 and the clock cannot go through, so it holds 60. The clock then is wired into a 74LS93 chip just like in previous projects. The outputs go through a 74LS48 display driver and then into a 7 segment display. The reset line for the MSI is a 4 input NAND gate, with output A and C being inverted. This is then NAND'ed with the reset switch to provide the reset for the MSI portion. The output of that NAND gate is then also the clock input for the SSI portion. This is a normal asynchronous up counter, and on 6 the 3 input NAND gate becomes a 0. This is then NAND'ed together with the inverted switch to provide the reset. The output of the SSI portion also goes through a 74LS48 display driver to a 7 segment display. Note, make sure to use 220 Ohm resistors between the outputs of the display drivers and the 7 segment display. Once it is all together you are done!
I started this project with just a rough idea of how to complete it by sketching in my engineering notebook. I then moved to multisim where I was able to figure out all the details. The clock input is first AND'ed together with the output of a NAND gate that will be 0 when the counter hits 60. This way once the clock hits 60 the AND gate is 0 and the clock cannot go through, so it holds 60. The clock then is wired into a 74LS93 chip just like in previous projects. The outputs go through a 74LS48 display driver and then into a 7 segment display. The reset line for the MSI is a 4 input NAND gate, with output A and C being inverted. This is then NAND'ed with the reset switch to provide the reset for the MSI portion. The output of that NAND gate is then also the clock input for the SSI portion. This is a normal asynchronous up counter, and on 6 the 3 input NAND gate becomes a 0. This is then NAND'ed together with the inverted switch to provide the reset. The output of the SSI portion also goes through a 74LS48 display driver to a 7 segment display. Note, make sure to use 220 Ohm resistors between the outputs of the display drivers and the 7 segment display. Once it is all together you are done!